There are many sources of performance variations of semiconductor circuits across a semiconductor die or chip. For example, fluctuations in dopant concentration and diffusion, layer thickness, etc create unavoidable random process variations from device to device. Systematic variations may be even larger, for example due to proximity effects which depend on the overall circuit layout.
Existing techniques to detect cross-chip performance variations on production designs have several drawbacks. An example of a prior art technique is shown in FIG. 1. Chip 101 includes process monitors 102, such as Performance Screen Ring Oscillators (PSROs). These process monitors 102 can be probed to determine circuit performance at various locations on the chip. However these devices are generally large and often require custom probing. Moreover, they are typically placed at the corners of the chip and thus are not useful to determine performance variations across the entire chip area.